LISA MODEL DESCRIPTION FORMAT 6.0
=================================
Design:   C:\Program Files\Labcenter Electronics\VSM.LIBS\VSM.LIBS SAMPLES\CMOS SERIES MODEL DESIGNS\4054_5_6\4056B.DSN
Doc. no.: <NONE>
Revision: <NONE>
Author:   <NONE>
Created:  15/06/03
Modified: 09/02/04

*PROPERTIES,0    

*MODELDEFS,0    

*PARTLIST,2    
U1,DECODER_4_7,DECODER_4_7,ALL=LOW,PRIMITIVE=DIGITAL,TYPE=7A
U2,LATCH_4,LATCH_4,PRIMITIVE=DIGITAL

*NETLIST,19   
#00000,2
U1,IP,D0
U2,OP,Q0

#00001,2
U1,IP,D1
U2,OP,Q1

#00002,2
U1,IP,D2
U2,OP,Q2

#00003,2
U1,IP,D3
U2,OP,Q3

QA,2
QA,OT
U1,OP,Q0

QB,2
QB,OT
U1,OP,Q1

QD,2
QD,OT
U1,OP,Q3

QE,2
QE,OT
U1,OP,Q4

QF,2
QF,OT
U1,OP,Q5

QG,2
QG,OT
U1,OP,Q6

QC,2
QC,OT
U1,OP,Q2

DFI,3
DFI,IT
U1,IP,EN
U2,IP,CLK

VEE,3
VEE,PR
U1,IP,ALL
U2,PS,RESET

A,2
A,IT
U2,IP,D0

B,2
B,IT
U2,IP,D1

C,2
C,IT
U2,IP,D2

D,2
D,IT
U2,IP,D3

STB,2
STB,IT
U2,IP,EN

VDD,2
VDD,PR
U2,IP,OE

*GATES,0    

