==============================
Design:   K:\PRODEV\LIBS\MEMORY\MODELS\27010.DSN
Doc. no.: <NONE>
Revision: <NONE>
Author:   <NONE>
Created:  01/03/00
Modified: 31/07/03

*PROPERTIES,6    
BASE=0
FILE=?
SHIFT=0
TG=5n
TPGM=1m
VPGM=12.5

*MODELDEFS,0    

*PARTLIST,3    
AD1,ADC,ADC,PRIMITIVE=ANALOG,RNEG=1k,TTOL=1u,V+=VCC,V-=GND,VHH=0.1*<VPGM>,VHL=0.1*<VPGM>,VTH=0.9*<VPGM>,VTL=0.5*<VPGM>
U1,MEMORY_17_8,MEMORY_17_8,BASE=<BASE>,FILE=<FILE>,INVERT="CS,RD",MODDATA="$32000,$FF",PRIMITIVE=DIGITAL,SHIFT=<SHIFT>,TDHLAD=<TACC>,TDHZCD=<TDF>,TDHZRD=<TDF>,TDLHAD=<TACC>,TDLZCD=<TDF>,TDLZRD=<TDF>,TDZHCD=<TCE>,TDZHRD=<TOE>,TDZHWD=<TOE>,TDZLCD=<TCE>,TDZLRD=<TOE>,TDZLWD=<TOE>,TG=<TG>,TWWR=<TPGM>
U2,AND_2,AND_2,INVERT=D0,PRIMITIVE=DIGITAL

*NETLIST,33   

#00000,2
U1,IP,WR
U2,OP,Q

#00001,2
AD1,PS,D
U2,IP,D1

A0,2
A0,GT
U1,IP,A0

A1,2
A1,GT
U1,IP,A1

A2,2
A2,GT
U1,IP,A2

A3,2
A3,GT
U1,IP,A3

A4,2
A4,GT
U1,IP,A4

A5,2
A5,GT
U1,IP,A5

A6,2
A6,GT
U1,IP,A6

A7,2
A7,GT
U1,IP,A7

A8,2
A8,GT
U1,IP,A8

A9,2
A9,GT
U1,IP,A9

A10,2
A10,GT
U1,IP,A10

A11,2
A11,GT
U1,IP,A11

A12,2
A12,GT
U1,IP,A12

A13,2
A13,GT
U1,IP,A13

A14,2
A14,GT
U1,IP,A14

A15,2
A15,GT
U1,IP,A15

A16,2
A16,GT
U1,IP,A16

$CE$,2
$CE$,GT
U1,IP,CS

$OE$,2
$OE$,GT
U1,IP,RD

D0,2
D0,GT
U1,IO,D0

D1,2
D1,GT
U1,IO,D1

D2,2
D2,GT
U1,IO,D2

D3,2
D3,GT
U1,IO,D3

D4,2
D4,GT
U1,IO,D4

D5,2
D5,GT
U1,IO,D5

D6,2
D6,GT
U1,IO,D6

D7,2
D7,GT
U1,IO,D7

VPP,2
VPP,GT
AD1,PS,A

VCC,2
VCC,PR
AD1,PP,V+

GND,2
GND,PR
AD1,PP,V-

$PGM$,2
$PGM$,GT
U2,IP,D0

*GATES,0    